Zhaki, Faris Amsyar Ahmad (2017) Design Of 0.13-Μm Cmos Lna With Flat Gain For Cognitive Radio Application_Design Of 0.13-Μm Cmos Lna With Flat Gain For Cognitive Radio Application. Project Report. Universiti Sains Malaysia, Pusat Pengajian Kejuruteraan Elektrik & Elektronik. (Submitted)
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Abstract
A low noise amplifier (LNA) is one of the important component in a CR receiver that amplifies a very low-power signal and minimized additional noise from the received signal. The biggest challenge in designing an LNA for ultra-wideband (UWB) application as required in CR, is to obtain high flat gain throughout wide bandwidth. This thesis presents the design of CMOS LNA with high flat gain for ultra-wideband (UWB) application between 300 MHz to 10 GHz frequency spectrum. In order to implement the LNA in CR application, the LNA must be able to provide wide bandwidth operation at high flat gain. Besides focusing on the targeted high flat gain throughout the wide bandwidth, other performance metrics must be optimized to fulfill the design target specification. The proposed LNA design is a cascode amplifier with resistive shunt feedback, determined based on its merits that can fulfill the design requirement of this work. The LNA was designed in Silterra’s 0.13-μm CMOS process technology and the pre-layout simulation was executed by using Cadence SpectreRF. The achieved gain is within 18.56 dB to 21.31 dB with a variation of 2.75
| Item Type: | Monograph (Project Report) |
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| Subjects: | T Technology T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering |
| Divisions: | Kampus Kejuruteraan (Engineering Campus) > Pusat Pengajian Kejuruteraaan Elektrik & Elektronik (School of Electrical & Electronic Engineering) > Monograph |
| Depositing User: | Mr Mohamed Yunus Mat Yusof |
| Date Deposited: | 17 Jun 2022 08:10 |
| Last Modified: | 17 Jun 2022 08:10 |
| URI: | http://eprints.usm.my/id/eprint/52940 |
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