Improved Structured Filter Design And Analysis Of Perturbed Pll Systems With Convex Optimizations

Bakar, Siti Juliana Abu (2020) Improved Structured Filter Design And Analysis Of Perturbed Pll Systems With Convex Optimizations. PhD thesis, Universiti Sains Malaysia.

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Phase-locked loops (PLLs) are essential circuits that are widely used in many applications such as communication and electronic systems. The importance of this circuit has prompted a great interest among researchers in studying and analyzing the stability and performance of PLL systems. Although many analyses are based on linearized models of the PLL system, the stability of the PLL is not guaranteed as the system may be interrupted by internal and external perturbations which include nonlinear behavior from the PLL components as well as time delay. As these perturbations lead to higher probability of performance degradation and instability, recent works have shown an increasing amount of research into a more accurate modeling of PLL system and analysis on the impacts of such uncertainties to the overall system’s behavior. In this study, a new approach to systematically model the nonlinear behavior of the PLL and to design the filter which is responsible to determine the system’s stability and performance is proposed. This approach is based on the H¥ control synthesis which is also integrated with a suitable nonlinear stability criterion. The resulting methods are then formulated into convex optimization problems which can guarantee optimality of the designed parameters. The results are then extended to applications of frequency synthesis which is also subject to the unwanted perturbations. A further extension of the proposed method is on the analyses of the PLL system that is also subject to time delay, which may be inherent from the system itself or artificially introduced to meet a certain PLL design requirement. The current findings reveal that the tracking capability of the PLL system can be theoretically enforced via the proposed methods which consequently lead to a wider lock range by 59% and a faster acquisition time by 22% as compared to the linear approximation method. Additionally, the results also show that the PLL system with the filter designed via the proposed method outperforms the existing methods. For example, when the proposed method is compared with the (Ahmad, 2017), the proposed method is able to produce a larger lock-in range by 87% with faster acquisition time by 5733% than that method. The results are also validated via a series of simulations and experiments which demonstrate the efficiency of the proposed methods in enhancing the frequency synthesis PLL performance. Apart from that, the analyses on the PLL subject to both nonlinearity and time delay have additionally been found to be beneficial in PLL design due to the systematic modeling method introduced along with the convex optimization techniques. It can also be concluded that this study has led to a new approach to further improve the real PLL structure with low computational complexity in the design and analysis methods.

Item Type: Thesis (PhD)
Subjects: T Technology
T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering > TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Divisions: Kampus Kejuruteraan (Engineering Campus) > Pusat Pengajian Kejuruteraaan Elektrik & Elektronik (School of Electrical & Electronic Engineering) > Thesis
Depositing User: Mr Mohamed Yunus Mat Yusof
Date Deposited: 31 Dec 2020 03:42
Last Modified: 17 Nov 2021 03:42

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