Pui , Min San
(2015)
Fault Diagnosis On Vlsi Adder Circuits Using Artificial Neural Network.
Masters thesis, Universiti Sains Malaysia.
Abstract
Fault diagnosis on VLSI digital circuit is a technique to detect a fault and the location of the fault that present in a VLSI digital circuit. A faulty circuit in an IC can cause the IC to be malfunctioning and unusable. Therefore, the faulty circuit must be detected during the manufacturing process to prevent the faulty IC from delivering to the customers, which can cause a reliability issue. Manual fault diagnosis, which is currently being used in industries, is carried out by the analysis of the human. However, the manual fault diagnosis, which relies heavily on the massive analysis by the human, has several disadvantages such as long diagnosis time for complicated fault diagnosis case, manual analysis, accuracy dependent to human errors, complexity of the faulty circuits, human intelligence, etc. Therefore, in this study, a new fault diagnosis approach, which is based on artificial neural network, is proposed to detect a fault and the fault location with better accuracy and diagnosis time if compared to the manual fault diagnosis. In this study, the proposed fault diagnosis is designed based on the hierarchical neural network, which transforms each of the full-adder circuits to an individual artificial neural network. The proposed fault diagnosis has 100% accuracy when it is applied to the 4-bit adder, 5-bit adder and 6-bit adder as well as one second diagnosis time. On the other hand, the manual fault diagnosis may take up to a few days to diagnose the adder circuits. Thus, the proposed automated fault diagnosis has high potential to be applied for VLSI digital circuits in industries.
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