Thermal And Flicker Noise Analysis In Sample And Hold Circuit

Maniam, Balamurali (2015) Thermal And Flicker Noise Analysis In Sample And Hold Circuit. Masters thesis, Universiti Sains Malaysia.

[img] PDF
Download (542kB)

Abstract

In low-frequency applications, noise is becoming more of an issue as the MOS size reduced. Therefore, the flicker noise and thermal noise are one of the issues found in low-frequency applications. In this work, the thermal noise and flicker noise are modelled and measured on the sample-and-hold circuit, based on Fully Differential Folded Cascode with Common Mode Feedback. The thermal noise analysis and flicker noise analysis are performed by varying the capacitance value and transistor sizes in the sample-and-hold circuit. In thermal noise analysis, the maximum output SNR measured is -120.28dB with 0.642uV/√Hz input thermal noise and transistor size for NMOS is set to 8μm. The maximum output SNR obtained for flicker noise is -83.27dB for 1uA input noise with low capacitance value 0.5pF and is measured at 1Hz frequency in sample-and-hold circuit.

Item Type: Thesis (Masters)
Subjects: T Technology > T Technology (General)
T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering > TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Divisions: Kampus Kejuruteraan (Engineering Campus) > Pusat Pengajian Kejuruteraaan Elektrik & Elektronik (School of Electrical & Electronic Engineering) > Thesis
Depositing User: Mr Mohamed Yunus Mat Yusof
Date Deposited: 11 Aug 2020 01:57
Last Modified: 22 Oct 2020 03:03
URI: http://eprints.usm.my/id/eprint/46871

Actions (login required)

View Item View Item
Share