Development And Implementation Of A New Technique For Bert (Bit Error Rate Tester) Using SDR Platform

Hamza, Ekhlas Kadhum (2011) Development And Implementation Of A New Technique For Bert (Bit Error Rate Tester) Using SDR Platform. PhD thesis, Universiti Sains Malaysia.

Preview

PDF Download (781kB) | Preview

Abstract

Hardware/Software (HW/SW) co-design approaches become prospective choice due to its real time operation since these solutions are so flexible that cover extensive complicated systems and reduce time from design to market. Hybrid digital signal processors (DSPs), field programmable gate arrays (FPGAs) and general-purpose processors (GPPs) designs are viable solution for software defined radio (SDR) technology. This thesis demonstrates a practical design and implementation procedure for building a useful, efficient and flexible model of a bit error rate tester (BERT) on physical layer for UHF-band of the digital transceivers by using new architecture in Multi-Core Software-Defined Radio

Item Type:	Thesis (PhD)
Subjects:	T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering > TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Divisions:	Kampus Kejuruteraan (Engineering Campus) > Pusat Pengajian Kejuruteraaan Elektrik & Elektronik (School of Electrical & Electronic Engineering) > Thesis
Depositing User:	ASM Ab Shukor Mustapa
Date Deposited:	11 Feb 2019 02:19
Last Modified:	12 Apr 2019 05:26
URI:	http://eprints.usm.my/id/eprint/43261

Actions (login required)

View Item