Post-Silicon General Bus Function Model Modelling Approach Using C Code For Test Scheme Reuse And Sharing

Chang , Ling Kwai (2014) Post-Silicon General Bus Function Model Modelling Approach Using C Code For Test Scheme Reuse And Sharing. Masters thesis, Universiti Sains Malaysia.

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Short product life cycle of a semiconductor IC is crucial for a company to gain better market share. But current validation process has become one of the bottleneck in semiconductor IC development process, where enhancement in this area can reduce the product lead time to market. There is a gap between pre- and post-silicon where both area is doing similar things but in different environment. A way to bridge the gap is by using the same test scheme which is applicable for both environment. This paper discuss and come out with an approach on how to model post-silicon BFM using high level programming language (C code) that is capable of content sharing and reuse between both pre- and post-silicon validation. Two methods to model post-silicon BFM are being approached and the more suitable one is being selected. The comparison is done is aspect of meeting strict timing requirement in sending signal. A prototype model of the selected model, which is second model is developed and tested in post-silicon validation environment to prove validity of the design. Test content in C code is created and synthesize into FPGA, act as stimulus generator for validation. The BFM device bit-accuracy behavior of the modelled Audio bus protocol is checked with waveform and signal trace. With this working model for developing BFM, pre- and post-silicon validation can share the same test scheme, saving efforts and time of developing test devices.

Item Type: Thesis (Masters)
Additional Information: Accession No:875005845
Subjects: T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering > TK7800-8360 Electronics
Divisions: Kampus Kejuruteraan (Engineering Campus) > Pusat Pengajian Kejuruteraaan Elektrik & Elektronik (School of Electrical & Electronic Engineering) > Thesis
Depositing User: Mr Mohd Fadli Abd Rahman
Date Deposited: 25 Jul 2018 02:54
Last Modified: 25 Jul 2018 02:54

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