Tan , Tze Liang
(2017)
Clock Distribution Network Building Algorithm For Multiple Ips In System On A Chip.
Masters thesis, Universiti Sains Malaysia.
Abstract
In this project, an algorithm is proposed and developed to build the global CDN
that is used to distribute the clocks to all partitions in the SoC using the channels available
between partitions. The conventional method of building the global CDN involves
manual interventions which decrease the global CDN building efficiency and increase the
overall SoC design cycle. To solve this issue, an algorithm is proposed to automate the
global CDN building process and at the same time obtain a balanced overall CDN not
achieved by the conventional method. Other researches have proposed different CDN
structures to simplify the design process but the proposals often sacrifice placement
resources to achieve this. The algorithm first collects the partition clock latency numbers
and other constraints needed as setup. When the setup is done, the global CDN is build
and routed. The algorithm checks for clock skew and scenic routing issues before
proceeding to shield the global CDN to prevent cross-talk issues. The algorithm is done
when a final checking on the clock skew is done. The algorithm is tested on two different
floorplans with varying size and available channels using three different clocks for each
floorplan to ensure the accuracy of the algorithm. Finally, the global CDN build using the
algorithm is evaluated based on the time needed to build the global CDN and the clock
buffer numbers and areas used. The algorithm is shown to be able to reduce 50% of the
global CDN design cycle and save 5% of clock buffer numbers and areas. The
improvement achieved by the algorithm in this project shows the efficiency in designing
the global CDN improved tremendously compared to conventional method.
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