Embedded Parallel Systolic Architecture For Multi-Filtering Techniques Using FPGA.

H. Salih, Muataz and Arshad, M. R. (2010) Embedded Parallel Systolic Architecture For Multi-Filtering Techniques Using FPGA. In: 2010 2nd International Conference on Electronic Computer Technology (ICECT 2010).

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Abstract

Computing systems typically suffer from delay in data processing.

Item Type:	Conference or Workshop Item (Paper)
Subjects:	T Technology > TK Electrical Engineering. Electronics. Nuclear Engineering > TK1-9971 Electrical engineering. Electronics. Nuclear engineering
ID Code:	21979
Deposited By:	Mr Erwan Roslan
Deposited On:	18 Apr 2011 13:57
Last Modified:	18 Apr 2011 13:57

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